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doku:vsc3_architecture

VSC 3 architecture

Figure 1: Architecture of a 64 GB node on VSC 3: on each socket, the cores are numbered from 0-7. The PU P#x number tells how the processing units are named in the VSC 3 system. Since hyperthreading is active, there are two threads for every core. Each machine has 2 infiniband interfaces, each of them part of a NUMA node. (graphic from lstopo)

doku/vsc3_architecture.txt · Last modified: 2016/05/12 14:00 by jz